Researchers from ZJU and USTC successfully developed world’s smallest photonic quantum CNOT gate on silicon chip
To build universal quantum computers, an essential step is to realize the so-called controlled-NOT (CNOT) gate. Quantum photonic integrated circuits are well recognized as an attractive technology offering great promise for achieving large-scale quantum information processing, due to the potential for high fidelity, high efficiency, and compact footprints. Here, we demonstrate a supercompact integrated quantum CNOT gate on silicon by using the concept of symmetry breaking of a six-channel waveguide superlattice. The present path-encoded quantum CNOT gate is implemented with a footprint of 4.8×4.45μm2 (∼3λ×3λ) as well as a high-process fidelity of ∼0.925 and a low excess loss of <0.2dB. The footprint is shrunk significantly by ∼10000 times compared to those previous results based on dielectric waveguides. This offers the possibility of realizing practical large-scale quantum information processes and paving the way to the applications across fundamental science and quantum technologies.
This work was recently published in Physical Review Letters. The co-first authors are Dr. Zhang Ming from Zhejiang University and Dr. Feng Lantian from the University of Science and Technology of China. The corresponding authors are Professor Daoxin Dai of Zhejiang University and Professor Xifeng Ren of the University of Science and Technology of China.
Figure1. (a) Silicon QPIC with CNOT gates (b) Comparison to previous on-chip quantum CNOT gates